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At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

ATE Test Engineer

We are looking for a motivated ATE Test Engineer to join our semiconductor test engineering team in Valbonne (Sophia Antipolis), France . In this role, you will contribute to the development, validation, and optimization of Automated Test Equipment (ATE) solutions used to characterize and qualify advanced semiconductor devices and IP products.

Working closely with design, product, and validation teams across France, India, and the United States , you will support the entire product lifecycle-from early test development and silicon bring-up to production ramp-up and customer qualification. This position offers an excellent opportunity to develop expertise in semiconductor testing, characterization, and data analysis within a global and collaborative environment. Based on internal job descriptions and related ATE engineering documentation.

Key Responsibilities

• Develop, debug, and maintain ATE test programs for wafer sort and final test
• Convert design test patterns (e.g., VCD, wgl, stil) into ATE-compatible formats
• Generate and execute functional, parametric, characterization, and debug test programs
• Define test strategy, coverage, and limits in alignment with design specifications
• Perform silicon bring-up, characterization, and shmoo analysis
• Collect, process, and analyze ATE data using scripts and tools
• Debug failing devices in collaboration with design, IP, and product engineering teams
• Contribute to test methodologies and best practices
• Optimize test time, cost, and quality
• Work closely with cross-functional teams and support production ramp and customer qualification
• Use lab equipment (oscilloscopes, curve tracers) for validation and debug
• Contribute to loadboard and hardware interface development when needed

Required Qualifications

Education

• Master's degree in Electrical Engineering, Microelectronics, Electronics, Computer Engineering, or a related technical discipline.
• This position targets a junior engineer with 3 to 6 years of experience, and juniors can apply.

Technical Skills

• Understanding of semiconductor device testing and characterization methodologies.
• Programming experience in one or more languages such as C, C++, Python, or Java .
• Knowledge of data analysis, troubleshooting, and debugging techniques.
• Familiarity with digital electronics and semiconductor fundamentals.

Preferred Qualifications

• First experience with ATE platforms (e.g., Advantest 93K, Teradyne)
• Basic knowledge of DFT and functional test methodologies
• First experience with hardware design (loadboards, packages)
• Familiarity with semiconductor manufacturing processes
• Basic knowledge of digital, mixed-signal, or memory testing (CMOS, DRAM, SRAM)

Soft Skills

• Good analytical and problem-solving abilities.
• Curious mindset and willingness to learn new technologies.
• Ability to work effectively in multicultural and cross-functional teams.
• Good communication and collaboration skills.
• Good level of English required.

Location

Valbonne (Sophia Antipolis), France. The role involves regular collaboration with engineering teams located in France, India, and the United States.
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